TWR-S12G240【PDF 66/1292 页】TOWER SYSTEM MODULE S12G240

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Device Overview MC9S12G-Family

Table 1-10. 48-Pin LQFP/QFN Pinout for S12GN16 and S12GN32

Function

Internal Pull

<----lowest-----PRIORITY-----highest---->

Power

Resistor

Package Pin

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

Pin

PAD9

PAD2

PAD10

PAD3

PAD11

PAD4

PAD5

PAD6

PAD7

VDDA

VSSA

PS0

PS1

PS2

PS3

PS4

PS5

PS6

PS7

PM0

PM1

2nd

Func.

KWAD9

KWAD2

KWAD10

KWAD3

KWAD11

KWAD4

KWAD5

KWAD6

KWAD7

VRH

—

RXD0

TXD0

—

—

MISO0

MOSI0

SCK0

API_EXTCLK

—

—

3rd

Func.

ACMPO

AN2

ACMPP

AN3

ACMPM

AN4

AN5

AN6

AN7

—

—

—

—

—

—

—

—

—

ECLK

—

—

4th

Func

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

SS0

—

—

5th

Func

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

Supply

V DDA

V DDA

V DDA

V DDA

V DDA

V DDA

V DDA

V DDA

V DDA

—

—

V DDX

V DDX

V DDX

V DDX

V DDX

V DDX

V DDX

V DDX

V DDX

V DDX

CTRL

PER0AD/PPS0AD

PER1AD/PPS1AD

PER0AD/PPS0AD

PER1AD/PPS1AD

PER0AD/PPS0AD

PER1AD/PPS1AD

PER1AD/PPS0AD

PER1AD/PPS1AD

PER1AD/PPS1AD

—

—

PERS/PPSS

PERS/PPSS

PERS/PPSS

PERS/PPSS

PERS/PPSS

PERS/PPSS

PERS/PPSS

PERS/PPSS

PERM/PPSM

PERM/PPSM

Reset

State

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

—

—

Up

Up

Up

Up

Up

Up

Up

Up

Disabled

Disabled

1

The regular I/O characteristics (see Section A.2, “I/O Characteristics ” ) apply if the EXTAL/XTAL function is disabled

MC9S12G Family Reference Manual, Rev.1.23

68

Freescale Semiconductor

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